Bazsites.com Hardware Description Languages
Directory Topics
On the Web
- HDL at Wikipedia - Definitions, resources, and links related to hardware description languages.
- VHDL International (VI) - organization dedicated to cooperatively and proactively promoting the Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) as a standard worldwide language for the design and description of electronic systems
- RHDL - RHDL (Ruby Hardware Description Language) is an HDL based on the Ruby programming language.
- ABEL Primer - Overview of the ABEL Hardware Description Language.
- MyHDL - MyHDL is a Python package for using Python as a hardware description and verification language.
- AMSWizard: Simulation of Analog Mixed Signals - VHDL-AMS is a hardware description language supporting the description and simulation of digital, analog, and mixed-signal systems in a single language.
- Project VeriPage - Your one stop source for Verilog Programming Language Interface (PLI) resources
- handel-c - A variant of C, handel-c is a behavioral language for FPGA design.
- Amontec VHDL Window - Provides complete online language reference and examples of common constructs.
- Confluent.org - Confluence language development, designer resources, and other free frontend EDA tools.
Wikipedia Articles
- Hardware description language - In electronics, a hardware description language or HDL is any language from a class of computer languages for formal description of electronic circuits. It can describe the circuit's operation, its design and organization, and tests to verify its operation by means of simulation.
- C to HDL - This page is to describe tools and methods that convert C or C like languages into hardware description languages like VHDL or Verilog. Typically this is a method of creating designs for Field-programmable_gate_array.
- Open Verification Library - Open Verification Library (OVL) is a library of property checkers for digital circuit descriptions written in popular Hardware Description Languages (HDLs). OVL is currently maintained by Accellera.
- Flow to HDL - This page is to describe tools and methods that convert Flow based system design into hardware description languages like VHDL or Verilog. Typically this is a method of creating designs for Field-programmable_gate_array, ASIC prototyping and DSP design.