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- Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools - By Joseph A. Fisher, Paolo Faraboschi, Cliff Young; Morgan Kaufmann, 2004, ISBN 1558607668. Technology is removing the gap between embedded and VLIW computing: high-performance methods that seemed too costly for embedded use have become feasible and popular. Book description, reviews, biographies.
- VLIW at IBM Research - Very-Long Instruction Word architectures: an alternative way to organize processors. Instead of the trend toward hardware making complex decisions for scheduling machine-level instructions in programs, VLIW systems do scheduling at compile time.
- VLIW Processors and Trace Scheduling - Descriptions, history, examples, references; in HTML, PDF, and in: The Computer Engineering Handbook, by Vojin Oklobdzija, CRC Press, 2001, ISBN 0849308852.
- Code-morphing: Fresh as a DAISY - On translating software between x86-based and VLIW processors, mainly IBM's code-morphing chip similar to Transmeta's.
- O'Boyle, Michael - University of Edinburgh - Auto-parallelising compilers, optimising for locality, compiling for distributed shared memory, adaptive compilation for VLIW processors, linear program transformation theory and practice, parallelisation of commercial languages and applications, compiler directed memory coherence, compiler impact on architecture.
- Very Long Instruction Word - Growing entry, with links to many related topics. [Wikipedia]
- Microprocessor Architectures from VLIW to TTA - By Henk Corporaal; John Wiley, 1998, ISBN 047197157X. Introduces Transport Triggered Architectures, TTAs. In standard architectures, programmed operations trigger internal data transports. TTAs work by programming data transports themselves. This removes bottlenecks, allows for new code generation optimizations, uses hardware more efficiently.
- 4stack Processor - Research project for high performance, low cost computing. Uses stack-based instructions for a 4-way VLIW processor. Implemented in current technology, it would outrun high-end DSPs (TMS 320C6x, TigerSHARC), and let the full program run on one processor, with no further RISC core.
- Sound and Vision: A Technical Overview of the Emotion Engine - Multipart analysis with text, diagrams; 128-bit VLIW combination CPU and DSP. [Ars Technica]
- PlayStation Turns Supercomputer - US researchers make supercomputer out of cluster of PS2 game consoles, which use Emotion Engine 128-bit VLIW processors. [BBC News]
Wikipedia Articles
- Efficeon - The Efficeon processor is Transmeta's second-generation 256-bit VLIW design which employs a software engine to convert code written for x86 processors to the native instruction set of the chip (Code Morphing Software, aka CMS). Like its predecessor, the Transmeta Crusoe (a 128-bit VLIW architecture), Efficeon stresses computational efficiency, low power consumption, and a low thermal footprint.
- Slot (computer architecture) - A slot comprises the operation issue and data paths machinery surrounding a collection of one or more functional units (FUs) which share these resources. The term slot is common for this purpose in the VLIW world where the relationship between operation in an instruction and pipeline to execute it is explicit.
- TriMedia - TriMedia is a VLIW Mediaprocessor family from NXP Semiconductors (formerly Philips Semiconductors). TriMedia is a Harvard architecture CPU that features many DSP and SIMD operations to efficiently process audio and video data streams.
- CEVA-X DSP - The CEVA-X family of DSP cores from CEVA is based on the company's latest pioneering DSP architecture. The CEVA-X architecture has a unique mix of Very Long Instruction Word (VLIW) and Single Instruction Multiple Data (SIMD) architectures.
- MAJC - MAJC (Microprocessor Architecture for Java Computing) was a Sun Microsystems multi-core, multithreaded, very long instruction word (VLIW) microprocessor design from the mid-to-late 1990s. Originally called the UltraJava processor, the MAJC processor was targeted at running Java programs, whose "late compiling" allowed Sun to make several favourable design decisions.